The following U.S. patent applications, all assigned to the assignee hereof, are hereby incorporated by reference: U.S. Pat. Nos. 5,081,536; 5,105,277; and 5,148,268.
The present invention relates to image sensor devices, such as used in, for example, digital cameras or document scanning devices, and in particular to apparatus having an array of photodiodes outputting to an output line through CMOS circuitry.
Image sensor arrays, such as found in digital document scanners and digital cameras, typically comprise a linear array of photosites which raster scan a focused image, or an image bearing document, and convert the set of microscopic image areas viewed by each photosite to image signal charges. Following an integration period the image signal charges are amplified and transferred to a common output line or bus through successively actuated multiplexing transistors.
Currently there are two generally accepted basic technologies for creating such linear arrays of photosites: Charge-coupled devices, or CCD""s, and CMOS. In CMOS, the photosenors are in the form of photodiodes, which output a charge in response to light impinging thereon. In the scanning process, bias and reset charges are applied in a predetermined time sequence during each scan cycle. Certain prior art patents, such as U.S. Pat. No. 5,081,536 assigned to the assignee hereof, disclose two-stage transfer circuits for transferring image signal charges from the photosites in CMOS image sensors.
One concern in CMOS-type image sensor arrays is that the photodiodes are constantly outputting charge as long as light is impinging thereon. In, for example, a full-color array, where there are three distinct arrays of photodiodes, each array of photodiodes being separately associated with a translucent filter thereon, signals are read out from the different primary-color arrays in a sequence, and for long portions of the duty cycle of reading out signals, the photodiodes associated with a color which is not being read out at a particular time will be generating charge therein, this charge not ultimately being associated with any usable signal. Thus, full-color CMOS-type image sensor arrays run a risk of an unwanted accumulation of charge in the photodiodes thereof. This accumulation of charge in the photodiodes can ultimately result in xe2x80x9cbloomingxe2x80x9d, which is the spread of excess charge caused by the exposure of light leaking from one photodiode to neighboring photodiodes. If the excess charge leaks onto adjacent photodiodes in the same primary-color-filtered array, one type of artifact will result in the scanned image, and if charge from one primary-color-filtered photodiode leaks into the photodiode associated with another primary color, serious distortions in the color separation signals output from the array will result (such as, for example, when an excess of charge in a red-filtered photodiode spills into a blue-filtered photodiode). There therefore exists a need for avoiding accumulation of excess charge in photodiodes in a CMOS image sensor array.
U.S. Pat. No. 5,614,744 discloses a CMOS-based image sensor which uses guard rings and/or protective diffusions to prevent electrons generated at the periphery of an active area from impacting upon the image sensor array.
U.S. Pat. No. 5,471,245 discloses an image array in which each photosensor is associated with a column sense line and one column clamp transistor. A source of the photosensor is coupled to the column sense line, and a source of the column clamp transistor is coupled to the photosensor source.
U.S. Pat. No. 5,291,044 discloses a CCD image sensor in which storage of electrons in a photodiode junction region of the sensor is eliminated by removing an anti-blooming barrier and allowing charge to flow from the sensor""s photodiode junctions into an overflow region.
U.S. Pat. No. 5,148,268 discloses a multiplexing arrangement for a color-enabled CMOS-type image sensor array. Three photodiodes per cell, each photodiode being filtered with a translucent filter to accept light of one primary color, are connected via a common node to a two-stage transfer circuit. A clocking scheme is applied to the transfer circuit to enable multiplexing of different primary-color signals from the photosensors to the output line.
U.S. Pat. No. 5,105,277 represents an improvement to the ""536 patent, in which split clock transistor actuating pulses are applied to the transfer circuit, to cancel variations among a large number of photodiodes.
U.S. Pat. No. 5,081,536 discloses the basic architecture of a transfer circuit which injects a bias charge onto a photodiode in a CMOS-based image sensor array.
U.S. Pat. No. 4,758,741 discloses a solid-state imaging device in which each photosensor includes a detector which imposes a given surface potential. In case of over illumination of the detector, the detector is biased at its open circuit voltage and supplies no further current until the surface potential of the photosensor reaches a given surface potential, which produces an anti-blooming effect.
U.S. Pat. No. 4,667,392 discloses a solid-state image sensor including a plurality of nMOS transistors, each transistor separated by a field insulating film, and also separated from the silicon substrate with a buried insulating film. The buried insulating film suppresses cross talk among adjacent transistors.
U.S. Pat. No. 4,500,924 discloses a solid-state imager in which a photodiode is associated with a non-photosensitive second photodiode. A blooming suppression pulse is supplied to both diodes simultaneously with a read pulse, which as the effect of enlarging a dynamic range of the imaging apparatus.
U.S. Pat. No. 4,267,469 discloses a two-dimensional solid-state imaging device wherein a plurality of photodiodes are arranged in rows and columns, each addressable by a row and column line. In this arrangement, an anti-blooming signal can be applied selectively to rows of photodiodes through the same line in which a neighboring line of photodiodes are reset.
According to one aspect of the present invention, there is provided a photosensitive apparatus, comprising a photodiode and a transfer circuit for transferring a signal from the photodiode to an output line. A spillover protection device applies a potential to the photodiode in response to a spillover condition in which a charge on the photodiode exceeds a predetermined threshold. Clocking means cause the transfer circuit to periodically inject a predetermined bias charge on the photodiode. The clocking means further cause the spillover protection circuit to be disabled while the predetermined bias charge is injected on the photodiode.
According to another aspect of the present invention, there is provided a method of operating a photosensitive apparatus comprising a photodiode and a spillover protection device for applying a potential to the photodiode in response to a spillover condition in which a charge on the photodiode exceeds a predetermined threshold. A predetermined bias charge is injected on the photodiode and the spillover protection device is disabled while the predetermined bias charge is injected on the photodiode.
According to another aspect of the present invention, there is provided a photosensitive apparatus, comprising a photodiode and a transfer circuit for transferring a signal from the photodiode to an output line. A transistor having a gate, a source, and a drain is provided, the source of the transistor being connected to a node between the photodiode and the transfer circuit, the drain being connected to the gate and the gate is connectable to a reference voltage. A reference circuit outputs a reference voltage to the gate, the reference circuit outputting a reference voltage which is higher than a threshold voltage associated with the transistor and which is lower than the sum of the threshold voltage associated with the transistor and a voltage which corresponds to a maximum signal from the photodiode to the transfer circuit.